module cpsr_wrapper(
  input clk,
  input rst,
  input [16:0] write_in_bundle,
  output [3:0] nzcv,
  output [2:0] aif,
  output [4:0] mode
);

wire       nzcv_we;
wire [3:0] nzcv_d;
wire [2:0] aif_we;
wire [2:0] aif_d;
wire       mode_we;
wire [4:0] mode_d;

assign {nzcv_we, nzcv_d, aif_we, aif_d, mode_we, mode_d} = write_in_bundle;

cpsr u_cpsr(
  .clk(clk),
  .rst(rst),
  .nzcv_we(nzcv_we),
  .nzcv_d(nzcv_d),
  .aif_we(aif_we),
  .aif_d(aif_d),
  .mode_we(mode_we),
  .mode_d(mode_d),
  .nzcv(nzcv),
  .aif(aif),
  .mode(mode)
);

endmodule
